一種低靜態(tài)電流、高穩(wěn)定性的LDO線性穩(wěn)壓器
A Low-dropout Regulator with Low Quiescent Current and High Stability
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摘要: 該文提出了一種低靜態(tài)電流、高穩(wěn)定性低壓差(LDO)線性穩(wěn)壓器。LDO中的電流偏置電路產(chǎn)生30nA的低溫度漂移偏置電流，可使LDO的靜態(tài)工作電流降低到4A。另外，通過(guò)設(shè)計(jì)一種新型的動(dòng)態(tài)Miller頻率補(bǔ)償結(jié)構(gòu)使得電路的穩(wěn)定性與輸出電流無(wú)關(guān)，達(dá)到了高穩(wěn)定性的設(shè)計(jì)要求。芯片設(shè)計(jì)基于CSMC公司的0.5m CMOS混合信號(hào)模型，并通過(guò)了流片驗(yàn)證。測(cè)試結(jié)果表明，該穩(wěn)壓器的線性調(diào)整和負(fù)載調(diào)整的典型值分別為2mV和14mV；輸出的最大電流為300mA；其輸出壓差在150mA輸出電流，3.3V輸出電壓下為170mV；輸出噪聲在頻率從22Hz到80kHz間為150VRMS。Abstract: An unconditionally stable low-dropout regulator and low quiescent current is presented. The Low DropOut ( LDO) based on a high precision CMOS current reference, which is comprised of subthreshold transistors and has small temperature coefficient, provides a low quiescent current of approximately 4A. Furthermore, by utilizing the design method of active Miller frequency compensation, the proposed LDOs stability is independent of the load or the Equivalent Series Resistance (ESR) of the off-chip capacitor. The chip design is based on 0.5#61549;m CMOS mixed-signal process of CSMC. The simulation and experimental results show that the line and load regulations are only 2mV and 14mV, respectively. The dropout voltage is only 170mV at 150mA output current when output voltage is 3.3V. The output noise is 150VRMS when frequency range is from 22Hz to 80 kHz.
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