三值DYL電路中的雙邊沿觸發(fā)器
DOUBLE-EDGE-TRIGGERED FLIP-FLOPS IN TERNARY DYL CIRCUITS
-
摘要: 該文通過對多晶體管的開關(guān)特性分析,結(jié)合其射極輸入、射極輸出、高速工作等特點設(shè)計了三值的雙邊沿觸發(fā)器。計算機模擬表明該設(shè)計具有正確的邏輯功能和高速工作的特性。它可用于三值DYL電路的設(shè)計。
-
關(guān)鍵詞:
- 多晶體管; 多元邏輯（DYL）電路; 雙邊沿觸發(fā)器
Abstract: By analyzing the switching characteristic of the multiple- transistor and combining its features of emit-input, emit-output and high working speed, a ternary double-edge-triggered flip-flops is designed in the paper. Computer simulation shows that this design has correct logic function and high working speed. It can be used in designing ternary DYL circuits. -
Unger S H.Double-edge-triggered flip-flops[J].IEEE Trans.on Computers.1981,C-30(6):447-451[2]Lu S L,Ercegovac M.A novel CMOS implementation of double-edge-triggered flip-flops[J].IEEE J.of Solid-State Circuits.1990,25(4):1008-1010[3]Hossain R,Wronski L D,Albicki A.Low power-design using double edge triggered flip-flops[J].IEEE Trans.VLSI Systems.1994,2(2):261-265[4]Afghahi M,Yuan J.Double-edge-triggered D-flip-flop for high-speed CMOS circuits[J].IEEE J.of Solid-State Circuits.1991,26(8):1168-1170[5]劉瑩，方振賢．I2L和TTL型雙邊沿D觸發(fā)器．電子科學(xué)學(xué)刊，1997，19(3)：416-419．[6]王守覺，孫翔義，王潤梅．一種新的高速集成電路多元邏輯電路(DYL)．電子學(xué)報，1978，6(2)：43-51．[7]吳訓(xùn)威，杭國強．基于比較運算與多晶體管的開關(guān)電路．中國科學(xué)(E輯)，1997，27(5)：444-452．[8]王守覺，吳訓(xùn)威等．基于線性與或門的新型超高速數(shù)字電路．電子科學(xué)學(xué)刊，1995，17(4)：337-343．[9]吳訓(xùn)威，蔣保緯．基于多晶體管的高速邏輯門．科學(xué)通報，1995，40(14)：1339-1341．[10]Wang S (王守覺),Wu X (吳訓(xùn)威),Feng H (馮宏娟).The high speed ternary logic gates based on the multiple-transistors.IEEE Proc of ISMVL,Bloomington:1995,178-181. -
計量
- 文章訪問數(shù): 2083
- HTML全文瀏覽量: 88
- PDF下載量: 439
- 被引次數(shù): 0
下載:
