用DSP實現(xiàn)相參處理器I/Q通道幅相誤差自動校正
IMPLEMENTATION OF THE CORRECTOR OF ERRORS IN I Q CHANNELS WITH DSP
-
摘要: 本文介紹I/Q通道誤差自動校正的實現(xiàn)方法。校正網(wǎng)絡(luò)由組合邏輯組成,可以校正同相支路和正交支路的幅相誤差和直流偏移。校正系數(shù)由DSP根據(jù)相參測試信號算出。當(dāng)幅度誤差為0.1dB,相位誤差為5時,產(chǎn)生的相對鏡像電平為-27dB。經(jīng)過誤差自動校正后,相對鏡像電平下降到-52dB。
-
關(guān)鍵詞:
- 數(shù)字信號處理器; 相參信號處理; 誤差校正
Abstract: This paper describes the implementation of the corrector of I Q errors in coherent processor. The correcting network consists of combination logic circuit and it can correct the gain and phase imbalances and the bias errors of the in-phase and quadrature channels in coherent signal processing. The correcting coefficients are computed with DSP using a test signal. The image level without correction is about -27dB if the errors of gain and phase in the coherent processor are 0.1dB and 5 respectively. The experimental results show that the image level is reduced to -52dB from -27dB after correcting the errors. -
Sinsky A I, Wang P C P. Error analysis of a quadrature coherent detector processor. IEEE Trans on AES 1974, AES-10(11): 880-883.[2]Curchbill F E et al. The correction of I and Q errors in a coherent processor. IEEE Trans. on AES 1981, AES-17(1): 131-137. -
計量
- 文章訪問數(shù): 2194
- HTML全文瀏覽量: 151
- PDF下載量: 713
- 被引次數(shù): 0
下載:
