一種輕量級(jí)數(shù)據(jù)加密標(biāo)準(zhǔn)循環(huán)掩碼實(shí)現(xiàn)方案
doi: 10.11999/JEIT190870 cstr: 32379.14.JEIT190870
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復(fù)旦大學(xué)專(zhuān)用集成電路與系統(tǒng)國(guó)家重點(diǎn)實(shí)驗(yàn)室 上海 201203
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上海復(fù)旦微電子集團(tuán)股份有限公司 上海 200433
基金項(xiàng)目: 十三五預(yù)先研究項(xiàng)目(3110105-09)
A Lightweight Implementation Scheme of Data Encryption Standard with Cyclic Mask
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State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China
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Shanghai Fudan Microelectronics Group Company Limited, Shanghai 200433, China
Funds: The 13th Five-Year Plan Advance Reserch Projects Fund of China (3110105-09)
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摘要: 隨著智能卡技術(shù)的不斷發(fā)展,智能卡芯片的安全性也面臨越來(lái)越大的挑戰(zhàn)。在眾多加密算法中,數(shù)據(jù)加密標(biāo)準(zhǔn)(DES)算法是一種應(yīng)用較廣的對(duì)稱(chēng)加解密算法。為了抵御各種側(cè)信道攻擊,使用最為廣泛的是在算法中通過(guò)掩碼技術(shù)來(lái)消除真實(shí)密鑰和功耗相關(guān)性,該文提出一種新的適用于DES的循環(huán)掩碼方案,和之前文獻(xiàn)中的預(yù)計(jì)算掩碼方案相比,不僅預(yù)計(jì)算量大大減少,而且整個(gè)DES運(yùn)算過(guò)程的中間數(shù)據(jù)都是帶有掩碼的,把掩碼拆分后,還可以防護(hù)高階攻擊。
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關(guān)鍵詞:
- 數(shù)據(jù)加密標(biāo)準(zhǔn) /
- 側(cè)信道攻擊 /
- 掩碼
Abstract: With the continuous development of smart card technology, the security of smart card chip is facing more and more challenges. Among many encryption algorithms, Data Encryption Standard(DES) algorithm is a widely used symmetric encryption and decryption algorithm. In order to resist all kinds of side channel attacks, the most widely used method is to eliminate correlation of the real key and power consumption through the masking technology in the algorithm. A new cyclic mask scheme for DES is proposed. Compared with the pre-calculated mask scheme in the previous literature, not only the pre-calculation amount is greatly reduced, but also the intermediate data in the whole DES operation process is masked. After the mask is split, it can also protect against high-order attacks.-
Key words:
- Data Encryption Standard(DES) /
- Side channel attack /
- Mask
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KOCHER P C. Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems[C]. The 16th Annual International Cryptology Conference, Santa Barbara, USA, 1996: 104–113. doi: 10.1007/3-540-68697-5_9. KOCHER P C, JAFFE J, and JUN B. Differential power analysis[C]. The 19th Annual International Cryptology Conference, Santa Barbara, USA, 1999: 388–397. doi: 10.1007/3-540-48405-1_25. RENAULD M and STANDAERT F X. Algebraic side-channel attacks[C]. The 5th International Conference on Information Security and Cryptology, Beijing, China, 2010: 393–410. doi: 10.1007/978-3-642-16342-5_29. TIRI K, AKMAL M, and VERBAUWHEDE I. A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards[C]. The 28th European Solid-State Circuits Conference, Florence, Italy, 2002: 403–406. TIRI K and VERBAUWHEDE I. A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation[C]. Design, Automation and Test in Europe Conference and Exhibition, Paris, France, 2004: 246–251. doi: 10.1109/DATE.2004.1268856. GUILLEY S, FLAMENT F, HOOGVORST P, et al. Secured CAD back-end flow for power-analysis-resistant cryptoprocessors[J]. IEEE Design & Test of Computers, 2007, 24(6): 546–555. doi: 10.1109/MDT.2007.202 樂(lè)大珩, 李少青, 張民選. 基于LBDL邏輯的抗DPA攻擊電路設(shè)計(jì)方法[J]. 國(guó)防科技大學(xué)學(xué)報(bào), 2009, 31(6): 18–24. doi: 10.3969/j.issn.1001-2486.2009.06.004YUE Daheng, LI Shaoqing, and ZHANG Minxuan. An LBDL based VLSI design method to counteract DPA attacks[J]. Journal of National University of Defense Technology, 2009, 31(6): 18–24. doi: 10.3969/j.issn.1001-2486.2009.06.004 YANG Shengqi, WOLF W, VIJAYKRISHNAN N et al. Power attack resistant cryptosystem design: A dynamic voltage and frequency switching approach[C]. The Conference on Design, Automation and Test in Europe, Munich, Germany, 2005: 64–69. doi: 10.1109/DATE.2005.241. CORON J S and KIZHVATOV I. An efficient method for random delay generation in embedded software[C]. The 11th International Workshop on Cryptographic Hardware and Embedded Systems, Lausanne, Switzerland, 2009: 156–170. doi: 10.1007/978-3-642-04138-9_12. CORON J S. Resistance against differential power analysis for elliptic curve cryptosystems[C]. The 1st International Workshop on Cryptographic Hardware and Embedded Systems, Worcester, USA, 1999: 292–302. doi: 10.1007/3-540-48059-5_25. 黃海, 馮新新, 劉紅雨, 等. 基于隨機(jī)加法鏈的高級(jí)加密標(biāo)準(zhǔn)抗側(cè)信道攻擊對(duì)策[J]. 電子與信息學(xué)報(bào), 2019, 41(2): 348–354. doi: 10.11999/JEIT171211HUANG Hai, FENG Xinxin, LIU Hongyu, et al. Random addition-chain based countermeasure against side-channel attack for advanced encryption standard[J]. Journal of Electronics &Information Technology, 2019, 41(2): 348–354. doi: 10.11999/JEIT171211 汪鵬君, 張躍軍, 張學(xué)龍. 防御差分功耗分析攻擊技術(shù)研究[J]. 電子與信息學(xué)報(bào), 2012, 34(11): 2774–2784. doi: 10.3724/SP.J.1146.2012.00555WANG Pengjun, ZHANG Yuejun, and ZHANG Xuelong. Research of differential power analysis countermeasures[J]. Journal of Electronics &Information Technology, 2012, 34(11): 2774–2784. doi: 10.3724/SP.J.1146.2012.00555 GOUBIN L and PATARIN J. DES and differential power analysis the “duplication” method[C]. The 1st International Workshop on Cryptographic Hardware and Embedded Systems, Worcester, USA, 1999: 158–172. doi: 10.1007/3-540-48059-5_15. STANDAERT F X, ROUVROY G, and QUISQUATER J J. FPGA implementations of the DES and triple-DES masked against power analysis attacks[C]. 2006 International Conference on Field Programmable Logic and Applications, Madrid, Spain, 2006: 1–4. doi: 10.1109/FPL.2006.311315. AKKAR M L and GIRAUD C. An implementation of DES and AES, secure against some attacks[C]. The 3rd International Workshop on Cryptographic Hardware and Embedded Systems, Paris, France, 2001: 309–318. doi: 10.1007/3-540-44709-1_26. AKKAR M L and GOUBIN L. A generic protection against high-order differential power analysis[C]. The 10th International Workshop on Fast Software Encryption, Lund, Sweden, 2003: 192–205. doi: 10.1007/978-3-540-39887-5_15. AKKAR M L, BéVAN R, and GOUBIN L. Two power analysis attacks against one-mask methods[C]. The 11th International Workshop on Fast Software Encryption, Delhi, India, 2004: 332–347. doi: 10.1007/978-3-540-25937-4_21. Lü Jiqiang and HAN Yongfei. Enhanced DES implementation secure against high-order differential power analysis in smartcards[C]. The 10th Australasian Conference on Information Security and Privacy, Brisbane, Australia, 2005: 195–206. doi: 10.1007/11506157_17. PROUFF E and RIVAIN M. A generic method for secure SBox implementation[C]. The 8th International Workshop on Information Security Applications, Jeju Island, Korea, 2007: 227–244. doi: 10.1007/978-3-540-77535-5_17. RIVAIN M, DOTTAX E, and PROUFF E. Block ciphers implementations provably secure against second order side channel analysis[C]. The 15th International Workshop on Fast Software Encryption, Lausanne, Switzerland, 2008: 127–143. doi: 10.1007/978-3-540-71039-4_8. ITOH K, TAKENAKA M, and TORII N. DPA countermeasure based on the “masking method”[C]. The 4th International Conference on Information Security and Cryptology—ICISC 2001, Seoul, Korea, 2002: 440–456. doi: 10.1007/3-540-45861-1_33. MAGHREBI H, GUILLEY S, and DANGER J L. Leakage squeezing countermeasure against high-order attacks[C]. The 5th IFIP International Workshop on Information Security Theory and Practice. Security and Privacy of Mobile Devices in Wireless Communication, Heraklion, Greece, 2011: 208–223. doi: 10.1007/978-3-642-21040-2_14. TANG Ming, QIU Zhenlong, GAO Si et al. Polar differential power attacks and evaluation[J]. Science China Information Sciences, 2012, 55(7): 1588–1604. doi: 10.1007/s11432-012-4588-5 -