基于線下估計(jì)和線上補(bǔ)償?shù)臅r(shí)間交錯(cuò)采樣ADC失配誤差補(bǔ)償方法

鄒應(yīng)全; 吳太龍; 彭榆淞; 孫一航; 劉宜罡; 張翠芳

doi:10.11999/JEIT180098

基于線下估計(jì)和線上補(bǔ)償?shù)臅r(shí)間交錯(cuò)采樣ADC失配誤差補(bǔ)償方法

doi: 10.11999/JEIT180098 cstr: 32379.14.JEIT180098

西南交通大學(xué)信息科學(xué)與技術(shù)學(xué)院 ??成都 ??611756

詳細(xì)信息

作者簡(jiǎn)介:
鄒應(yīng)全：男，1976年生，博士，副教授，研究方向?yàn)橹悄苄畔⒉杉c處理

吳太龍：男，1991年生，碩士生，研究方向?yàn)橹悄苄畔⑻幚砼c智能控制

彭榆淞：男，1990年生，碩士生，研究方向?yàn)橹悄苄畔⑻幚砼c智能控制

孫一航：男，1994年生，碩士生，研究方向?yàn)闊o線信息傳輸技術(shù)

劉宜罡：男，1992年生，碩士生，研究方向?yàn)橹悄苄畔⑻幚砼c智能控制

張翠芳：女，1961年生，博士，教授，研究方向?yàn)橹悄苄畔⑻幚砼c智能控制

通訊作者:
張翠芳　cfzhang_scce@home.swjtu.edu.cn

中圖分類號(hào): TN79+2; TP391
計(jì)量
- 文章訪問數(shù): 1765
- HTML全文瀏覽量: 554
- PDF下載量: 61
- 被引次數(shù): 0
出版歷程
- 收稿日期: 2018-01-04
- 修回日期: 2018-10-22
- 網(wǎng)絡(luò)出版日期: 2018-10-25
- 刊出日期: 2019-01-01

Method for Compensating Distortion Created by Mismatch Errors in Time-interleaved ADCs Based on Offline Estimation and Online Correction

School of Information Science and Technology, Southwest Jiaotong University, Chengdu 611756, China

摘要

摘要:
該文提出一種改進(jìn)的時(shí)間交錯(cuò)采樣模數(shù)轉(zhuǎn)換器(TIADC)失配誤差補(bǔ)償方法。系統(tǒng)通過誤差參數(shù)和簡(jiǎn)化的拉格朗日插值算法分別實(shí)現(xiàn)了對(duì)偏置、增益的失配誤差補(bǔ)償和采樣時(shí)間的失配誤差補(bǔ)償。該補(bǔ)償方法在FPGA中采用低復(fù)雜度的定點(diǎn)運(yùn)算實(shí)現(xiàn)，在TIADC硬件平臺(tái)中實(shí)現(xiàn)了對(duì)多通道ADC采樣數(shù)據(jù)的線上校正。實(shí)驗(yàn)結(jié)果表明：所提改進(jìn)方法在仿真環(huán)境下使無雜散動(dòng)態(tài)范圍提升了51 dB，并且在硬件實(shí)現(xiàn)過程中使SFDR優(yōu)化達(dá)45 dB。在保持失配誤差估計(jì)精度和補(bǔ)償效果優(yōu)良的前提下，該方法不僅降低了算法的計(jì)算復(fù)雜度，而且該補(bǔ)償結(jié)構(gòu)不受TIADC通道數(shù)目的限制。
- 模數(shù)轉(zhuǎn)換器 /
- 時(shí)間交錯(cuò)采樣 /
- 失配誤差 /
- 補(bǔ)償結(jié)構(gòu) /
- 定點(diǎn)運(yùn)算
Abstract:
A improved method is proposed for compensating the distortion created by mismatches in Time-Interleaved Analog-to-Digital Converters (TI ADCs). The error compensation of offset and gain is realized by error parameters, and the error compensation of sampling time is realized by the simplified Lagrange interpolation algorithm. The compensation method is implemented in FPGA with the low complexity of fixed-point algorithm, and the online calibration of multi-channel ADC sampling data is implemented in the TIADC hardware platform. The experimental results show that the proposed method improves the Spurious-Free Dynamic Range (SFDR) of sampling data up to 51 dB in the simulation environment, and optimizes the SFDR up to 45 dB in the process of hardware implementation. Under the premise of maintaining the error estimation precision and compensation effect, this method not only reduces the computational complexity of the algorithm, but also the compensation structure is not limited by the number of TIADC channels.
- Analog-to-Digital Converter /
- Time-interleaved sampling /
- Mismatch errors /
- Compensation structure /
- Fixed-point algorithm

HTML全文

圖 1 TIADC采樣結(jié)構(gòu)

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圖 2 偏置失配和增益失配誤差補(bǔ)償結(jié)構(gòu)圖

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圖 3 采樣時(shí)間失配誤差補(bǔ)償結(jié)構(gòu)圖

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圖 4 采樣輸出序列頻譜對(duì)比圖

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圖 5 Lagrange插值階數(shù)$N$與SFDR、輸入信號(hào)頻率與采樣頻率比值${f_{\rm{t}}}/{f_{\rm{s}}}$的關(guān)系圖

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圖 6 硬件失配誤差補(bǔ)償結(jié)構(gòu)運(yùn)算時(shí)間仿真圖

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圖 7 定點(diǎn)運(yùn)算與浮點(diǎn)運(yùn)算的失配誤差補(bǔ)償頻譜對(duì)比圖

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圖 8 TIADC系統(tǒng)中失配補(bǔ)償前后輸出數(shù)據(jù)頻譜對(duì)比圖

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表 1 失配誤差的真實(shí)值與估計(jì)值

ADC通道	ADC1	ADC2	ADC3	ADC4	ADC5	ADC6	ADC7	ADC8
G	1.04440	0.95730	0.96170	1.02140	1.00460	0.97110	1.04570	1.02500
$\widehat G$	1.04440	0.95723	0.96150	1.02137	1.00456	0.97081	1.04555	1.02493
O	0.02130	–0.01120	0.04290	0.02940	0.01250	0.02600	–0.03320	–0.03170
$\widehat O$	0.02130	–0.01119	0.04292	0.02940	0.01251	0.02599	–0.03320	–0.03169
T (ps)	0	502	–877	324	–415	1109	757	–496
$\widehat T\; {\rm{(ps)}}$	2	503	–879	324	–417	1112	758	–498

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表 2 本文所改進(jìn)的誤差估計(jì)算法與文獻(xiàn)[11]和文獻(xiàn)[13]中誤差估計(jì)算法的相對(duì)估計(jì)誤差對(duì)比(%)

估計(jì)方法	偏置誤差的相對(duì)估計(jì)誤差	增益誤差的相對(duì)估計(jì)誤差	采樣時(shí)間誤差的相對(duì)估計(jì)誤差
文獻(xiàn)[11]	1.416	0.02	1.29
文獻(xiàn)[13]	0.3	0.0096	1.28
本文改進(jìn)方法	0.04	0.03	0.48

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表 3 硬件補(bǔ)償電路的FPGA片上邏輯資源消耗情況

資源類型	總組合功能	專用邏輯寄存器	18 bit嵌入式乘法器	存儲(chǔ)容量
資源消耗情況	111/8256	98/8256	5/18	0/165888

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表 4 偏置、增益和采樣時(shí)間失配誤差估計(jì)值

ADC通道	ADC1	ADC2
$\widehat G$	1.061100	1.061900
$\widehat O\;\left( {\rm{V}} \right)$	–0.057000	0.000053
$\widehat T\;\left( {\rm{ns}} \right)$	1.191200	1.424300

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參考文獻(xiàn)(15)

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