基于脈沖跨周期調(diào)制的DC-DC變換器自適應(yīng)電壓調(diào)節(jié)技術(shù)

王東俊; 羅萍; 彭宣霖; 甄少偉; 賀雅娟

doi:10.11999/JEIT160283

基于脈沖跨周期調(diào)制的DC-DC變換器自適應(yīng)電壓調(diào)節(jié)技術(shù)

doi: 10.11999/JEIT160283 cstr: 32379.14.JEIT160283

基金項(xiàng)目:

國家自然科學(xué)基金(61274027)，國家自然科學(xué)基金青年基金(61404025)

計(jì)量
- 文章訪問數(shù): 1561
- HTML全文瀏覽量: 215
- PDF下載量: 347
- 被引次數(shù): 0
出版歷程
- 收稿日期: 2016-03-28
- 修回日期: 2016-08-30
- 刊出日期: 2017-01-19

Adaptive Voltage Scaling Technique for DC-DC Converter Based on Pulse Skip Modulation

Funds:

The National Natural Science Foundation of China (61274027), The National Natural Science Youth Foundation of China (61404025)

摘要

摘要: 為實(shí)現(xiàn)減小數(shù)字電路的供電電壓來降低其能量消耗的目的，該文提出基于脈沖跨周期調(diào)制(PSM)的DC-DC變換器自適應(yīng)電壓調(diào)節(jié)(AVS)技術(shù)。AVS技術(shù)通過追蹤和探測關(guān)鍵路徑復(fù)制(CPR)的延遲時(shí)間自適應(yīng)地調(diào)節(jié)數(shù)字電路的供電電壓。同時(shí)，具有自適應(yīng)占空比的PSM調(diào)制模式(APSM)被用來改善輕負(fù)載下變換器輸出電壓的紋波和效率。實(shí)驗(yàn)結(jié)果顯示，當(dāng)負(fù)載工作頻率在30～150 MHz范圍內(nèi)變化時(shí)，輸出電壓在0.6～1.5 V之間穩(wěn)定輸出。和傳統(tǒng)的固定工作電壓相比，該文設(shè)計(jì)的DC-DC變換器最大可節(jié)省83%的能耗。
- DC-DC變換器 /
- 自適應(yīng)電壓調(diào)節(jié) /
- 脈沖跨周期調(diào)制 /
- 關(guān)鍵路徑復(fù)制 /
- 自適應(yīng)占空比
Abstract: In order to decrease energy consumption of digital circuits by reducing the supply voltage, an Adaptive Voltage Scaling (AVS) for DC-DC converter based on Pulse Skip Modulation (PSM) is proposed. The AVS technique can scale supply voltage adaptively by probing and tracking the Critical Path Replica (CPR) delay time. To improve the output voltage ripple and efficiency of converter especially in light load, the PSM with Adaptive ratio duty (APSM) also is used. The experimental results show that the output voltage is well regulated from 0.6~ 1.5 V when the operation frequency of load varies within the range of 30~150 MHz. The maximum energy saving of 83% is obtained with the proposed converter compared to the traditional fixed voltage.
- DC-DC converter /
- Adaptive Voltage Scaling (AVS) /
- Pulse Skip Modulation (PSM) /
- Critical Path Replica (CPR) /
- Adaptive duty ratio

HTML全文

參考文獻(xiàn)(23)

KONIJNENBURG M, STANZIONE S, YAN L,?et al. A battery-powered efficient multi-sensor acquisition system with simultaneous ECG, BIO-Z, GSR, and PPG[C]. IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, 2016: 480-481.

DINI Michele, ROMANI Aldo, FILIPPI Mtteo, et al. A nanocurrent power management IC for low-voltage energy harvesting sources[J]. IEEE Transactions on Power Electronics, 2016, 31(6): 4292-4304.

JOSE Luis and NUNEZ Yanez. Adaptive voltage scaling with in-situ detectors in commercial FPGAs[J]. IEEE Transactions on Computers, 2015, 64(1): 45-53. doi: 10.1109/ TC.2014.2365963.

DANCY A P, AMIRTHARAJAH R, and CHANDRAKASAN A P. High-efficiency multiple-output DC-DC conversion for low-voltage systems[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000, 8(3): 252-263. doi: 10.1109/92.845892.

ZHEN Shaowei, LUO Ping, and ZHANG Bo. Design of highly integrated power management unit with dual DVS-enabled regulators[J]. Analog Integrated Circuits and Signal Processing, 2014, 80: 209-220. doi: 10.1007/s10470-014-0313- 1.

WIRNSHOFER M, HEI L, GEORGAKOS G, et al. A variation-aware adaptive voltage scaling technique based on in-siut delay monitoring[C]. IEEE 14th International Symposium on Design and Diagnostics of Electronic Circuits Systems (DDECS), Cottbus, Germany, 2011: 261-266.

LUO Ping, FU Songlin, ZHANG Xiang, et al. An adaptive voltage scaling circuits based on dominate pole compensation [C]. Processing 11th IEEE International Conference on ASIC, Chengdu, China, 2015: 1-4.

CHO M, KIM S, TOKUNAGA C,?et al. Post-silicon voltage-guard-band reduction in a 22nm graphics execution core using adaptive voltage scaling and dynamic power gating [C].?IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, 2016: 152-153.

ELGEBALY M and SACHDEV M. Variation-aware adaptive voltage scaling system[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2007, 15(5): 560-571. doi: 10.1109/TVLSI.2007.896909.

IKENAGA Y, NOMURA M, SUENAGA S, et al. A 27% active-power-reduced 40-nm CMOS multimedia SoC with adaptive voltage scaling using distributed universal delay lines[J]. IEEE Journal of Solid-State Circuits, 2012, 47(4): 832-840. doi: 10.1109/JSSC.2012.2185340.

KAPAT S, BANERJEE S, and PATRA A. Discontinuous map analysis of a DC-DC converter governed by pulse skipping modulation[J]. IEEE Transactions on Circuits and System I, 2010, 57(7): 1793-1801. doi: 10.1109/TCSI.2009. 2034888.

LIOU W R, YEH M L, and KUO Y L. A high efficiency Dual-Mode buck converter IC for portable applications[J]. IEEE Transactions on Power Electronics, 2008, 23(2): 667-677. doi: 101109/TPEL.2007.915047.

LUO Ping, LI Zhaoji, and ZHANG Bo. A novel improved PSM model in DCDC converter based on energy balance[C]. 37th IEEE Power Electronics Specialists Conference, Jeju, South Korea, 2006: 1-4.

KAPAT S, MANDI B C, and PATRA A. Voltage-mode digital pulse skipping control of a DC-DC converter with stable periodic behavior and improved light-load efficiency[J]. IEEE Transactions on Power Electronics, 2016, 31(4): 3372-3379. doi: 10.1109/TPEL.2015.2455553.

羅萍, 李肇基, 熊富貴, 等. 開關(guān)變換器的跨周期調(diào)制模式[J]. 電子與信息學(xué)報(bào), 2004, 26(6): 984-988.

LUO Ping, LI Zhaoji, XIONG Fugui, et al. Pulse-cycle skip modulation in switching converter[J]. Journal of Electronics Information Technology, 2004, 26(6): 984-988.

牛全民, 羅萍, 李肇基, 等. Boost 變換器跨周期調(diào)制(PSM)的狀態(tài)空間平均模型[J]. 電子與信息學(xué)報(bào), 2006, 28(10): 1955-1958.

NIU Quanmin, LUO Ping, LI Zhaoji, et al. Space state average model of PSM in boost converter[J]. Journal of Electronics Information Technology, 2006, 28(10): 1955-1958.

李航標(biāo), 張波, 羅萍, 等. 開關(guān)DC-DC變換器的自適應(yīng)占空比跨周期控制方法[J]. 電子與信息學(xué)報(bào), 2014, 36(9): 2265-2271. doi: 10.3724/SP.J.1146.2013.01693.

LI Hangbiao, ZHANG Bo, LUO Ping, et al. Pulse skip with adaptive duty ratio control technique for switching DC-DC converter[J]. Journal of Electronics Information Technology, 2014, 36(9): 2265-2271. doi: 10.3724/SP.J.1146. 2013.01693.

LI Hangbiao, ZHANG Bo, LUO Ping, et al. Adaptive duty ratio modulation technique in switching DC-DC converter operating in discontinuous conduction mode[J]. Analog Integrated Circuits and Signal Processing, 2014, 78(2): 361-371. doi: 10.1007/s10470-015-0603-2.

WEI G Y and HOROWITZ M. A fully digital energy-efficient adaptive power supply regulator[J]. IEEE Journal of Solid-State Circuits, 1999, 34(4): 520-528. doi: 10.1109/ 4.753685.

CALHOUN B H, WANG A, and CHANDRAKASAN A. Model and sizing for minimum energy operation in subthreshold circuits[J]. IEEE Journal of Solid-State Circuits, 2005, 40(9): 1778-1786. doi: 10.1109/JSSC.2005.852162.

相關(guān)文章

施引文獻(xiàn)

資源附件(0)

訪問統(tǒng)計(jì)