一種基于FPGA的微處理器軟錯(cuò)誤敏感性分析方法
doi: 10.11999/JEIT160225 cstr: 32379.14.JEIT160225
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1.
(合肥工業(yè)大學(xué)電子科學(xué)與應(yīng)用物理學(xué)院 合肥 230009) ②(合肥工業(yè)大學(xué)計(jì)算機(jī)與信息學(xué)院 合肥 230009)
基金項(xiàng)目:
國家自然科學(xué)基金(61274036, 61371025, 61474036, 61574052)，安徽省自然科學(xué)基金(1608085MF149)
FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor
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1.
(School of Electronic Science &
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2.
(School of Electronic Science &
Funds:
The National Natural Science Foundation of China (61274036, 61371025, 61474036, 61574052), Anhui Provincial Natural Science Foundation (1608085MF149)
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摘要: 為了自動(dòng)快速地分析微處理器對軟錯(cuò)誤的敏感性，該文提出一種基于FPGA故障注入的軟錯(cuò)誤敏感性分析方法。在FPGA芯片上同時(shí)運(yùn)行有故障和無故障的兩個(gè)微處理器，并充分利用FPGA的并行性，把故障注入控制、故障分類、故障列表等模塊均在硬件上實(shí)現(xiàn)，自動(dòng)快速地完成全部存儲(chǔ)位的故障注入。以PIC16F54微處理器為實(shí)驗(yàn)對象，基于不同負(fù)載分別注入約30萬個(gè)軟錯(cuò)誤用以分析微處理器軟錯(cuò)誤敏感性，并對敏感性較高的單元加固后再次進(jìn)行分析，驗(yàn)證該方法的有效性。實(shí)驗(yàn)數(shù)據(jù)表明，使用該方法進(jìn)行故障注入及敏感性分析所需的時(shí)間比軟件仿真方法提高了4個(gè)數(shù)量級。
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關(guān)鍵詞:
- FPGA /
- 故障注入 /
- 單粒子翻轉(zhuǎn) /
- 軟錯(cuò)誤 /
- 敏感性分析
Abstract: In order to quickly and automatically analyze the soft error sensitivity for microprocessors, a soft error sensitivity analysis method using FPGA-based fault injection is proposed. The fault and fault-free microprocessors on a FPGA are board run simultaneously. Moreover, a fault injection controller, a fault classification module and a fault list module are also implemented on the hardware. The method inherits the parallelism of the FPGA and achieves a fast and automatical fault injection for all storage bits. Further, using a PIC16F54 microprocessor as experimental subject, approximate 300, 000 soft errors are injected into the microprocessors to analyze its soft error sensitivity. In order to demonstrate the sensitivity evaluation efficiency of the method, the quite sensitive storage cells are hardened and the sensitivity is analyzed again. Compared to the simulation approach, experimental results show that the proposed technique achieves four orders of magnitude speedup.-
Key words:
- FPGA /
- Fault injection /
- Single event upset /
- Soft error /
- Sensitivity analysis
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CLARK J and PRADHAN D. Fault injection: a method for validating computer-system dependability[J]. Computer, 1995, 28(6): 47-56. doi: 10.1109/2.386985. 孫峻朝, 王建瑩, 楊孝宗. 故障注入方法與工具的研究現(xiàn)狀[J]. 宇航學(xué)報(bào), 2001, 22(1): 99-104. SUN Junzhao, WANG Jianying, and YANG Xiaozong. The present situation for research of fault injection methodology and tools[J]. Journal of Astronautics, 2001, 22(1): 99-104. KARLSSON J, FOLKESSON P, ARLAT J, et al. Application of three physical fault injection techniques to the experimental assessment of the MARS architecture[C]. Proceedings of 5th IFIP Working Conference on Dependable Computing for Critical Applications, Urbana-Champaign, IL, 1995, (10): 267-287. GAISLER J. A portable and fault-tolerant microprocessor based on the SPARC V8 architecture[C]. International Conference on Dependable Systems and Networks, Washington, D.C., 2002: 409-415. 黃海林, 唐志敏, 許彤. 龍芯1號處理器的故障注入方法與軟錯(cuò)誤敏感性分析[J]. 計(jì)算機(jī)研究與發(fā)展, 2006, 43(10): 1820-1827. HUANG Hailin, TANG Zhimin, and XU Tong. Fault injection and soft error sensitivity characterization for fault-tolerant Godson-1 processor[J]. Journal of Computer Research and Development, 2006, 43(10): 1820-1827. 武振平, 付方發(fā), 肖立伊. 基于VHDL故障注入的處理器敏感性分析[J]. 微電子學(xué)與計(jì)算機(jī), 2012, 29(10): 51-55. WU Zhenping, FU Fangfa, and XIAO Liyi. Sensitivity analysis for processor based on VHDL fault injection[J]. Microelectronics Computer, 2012, 29(10): 51-55. 吳杰. 基于VHDL的故障注入工具的研究與實(shí)現(xiàn)[D]. [碩士論文], 哈爾濱工業(yè)大學(xué), 2013. WU Jie. Research and implementation of VHDL-based fault injection tool[D]. [MsSter. dissertation], Harbin Institute of Technology, 2013. ADMANE N and ROTAKE D. Fault tolerant system for FPGA using simulation based fault injection technique[C]. 2015 International Conference on Communications and Signal Processing, Melmaruvathur, 2015: 0855-0859. 薛茜男, 李振, 姜承翔, 等. 面向航空環(huán)境的多時(shí)鐘單粒子翻轉(zhuǎn)故障注入方法[J]. 電子與信息學(xué)報(bào), 2014, 36(6): 1504-1508. doi: 10.3724/SP.J.1146.2013.01296 XUE Qiannan, LI Zhen, JIANG Chengxiang, et al. A single event upset fault injection method based on multi-clock for aviation environment[J]. Journal of Electronics Information Technology, 2014, 36(6): 1504-1508. doi: 10.3724/ SP.J.1146.2013.01296 SERRANO F, CLEMENTE J, and MECHA H. A methodology to emulate single event upsets in flip-flops using FPGAs through partial reconfiguration and instrumentation [J]. IEEE Transactions on Nuclear Science, 2015, 62(4): 1617-1624. doi: 10.1109/TNS.2015.2447391. SHOBANA M and SENTHIL S. Reconfigurable data processing using duplex fault tolerance system[C]. 2015 International Conference on Innovations in Information, Embedded and Communication Systems, Coimbatore, 2015: 1-5. doi: 10.1109/ICIIECS.2015.7192935. EBRAHIMI M, MOHAMMADI A, EJLALI A, et al. A fast, flexible, and easy-to-develop FPGA-based fault injection technique[J]. Microelectronics Reliability, 2014, 54(5): 1000-1008. doi: 10.1109/DATE.2012.6176538. MOHAMMADI A, EBRAHIMI M, EJLALI A, et al. SCFIT: A FPGA-based fault injection technique for SEU fault model[C]. Design, Automation amp; Test in Europe Conference amp; Exhibition, Dresden, 2012: 586-589. doi: 10.1109/DATE.2012.6176538. CIVERA P, MACCHIARULO L, REBAUDENGO M, et al. FPGA-based fault injection techniques for fast evaluation of fault tolerance in VLSI circuits[C]. Field-Programmable Logic and Applications, Berlin Heidelberg, 2001: 493-502. SHOKROLAH-SHIRAZI M and MIREMADI S. FPGA- based fault injection into synthesizable verilog HDL models [C]. Secure System Integration and Reliability Improvement, Yokohama, 2008: 143-149. -
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