DCTT統(tǒng)計(jì)最優(yōu)化模型及其性質(zhì)
DCTT STATISTICAL OPTIMIZATION METHOD AND ITS FEATURES
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摘要: 本文提出了集成電路最優(yōu)化中綜合考慮成品率極大、最佳容差設(shè)計(jì)、調(diào)整設(shè)計(jì)和生產(chǎn)效益極大化設(shè)計(jì)的統(tǒng)計(jì)最優(yōu)化模型(Design Centering,Tolerance and Tuning.簡(jiǎn)稱DCTT模型)。討論了該模型與廣義統(tǒng)計(jì)最優(yōu)化模型的等價(jià)性以及其他主要性質(zhì)。在確定性最優(yōu)化框架下,該模型為統(tǒng)計(jì)最優(yōu)化和集成電路可制造性設(shè)計(jì)的進(jìn)一步發(fā)展開(kāi)辟了新途徑。
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關(guān)鍵詞:
- 集成電路; 統(tǒng)計(jì)最優(yōu)化; 不可微規(guī)劃
Abstract: A statistical optimization method of integrated circuit design is proposed. This model summerizes optimal centering design of yield maximization, optimal tolerance, tuning design and maximum production profit design. The equivalence between this method and the general statistical optimization method is discussed, and the main features of the model are given. Based on the frame of deterministic optimization method, the general statistical optimization method can be improved further by the model proposed in this paper. -
J. W. Bandler, S. Clien, IEEE Trans. on MTT[2]MTT-33 (1988) 3, 424-441.[3]K. Mozumder, A. J. Strojwas, Proc. IEEE, 78(1990) 2, 435-454.[4]郝躍,應(yīng)用科學(xué)學(xué)報(bào),9(1991)3,233-242.[5]郝 躍,西安電子科技大學(xué)學(xué)報(bào),17(1990)4,76-81.[6]J. P. Spoto et al., IEEE Trans. on CAD/IC, CAD-5 (1986) 1, 90-106.[7]郝躍,電子科學(xué)學(xué)刊,13(1991)1,78-82.[8]K. W. Kiwiel, Method of Descent for Nondifferentiable Optimization, Springer-Verlag, Berlin. (1985), Chap. 7.[9]D. G. Luenberger, Introduction to Linear and Nonlinear Programming, Addision-Wesley, Publi[10]shing Co. (1973), Chap. 5.[11][9][12]J. W. Bandler et al.,IEEE Trans, on MTT,MTT-33 (1985) 12, 1519-1530. -
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