同步時序電路的增廣Petri網(wǎng)分析
ANALYSIS OF SYNCHRONOUS SEQUENTIAL CIRCUITS BASED ON EXTENDED PETRI NET
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摘要: 本文應(yīng)用帶抑制弧的增廣Petri網(wǎng)建立了基本門電路和常用觸發(fā)器的Petri網(wǎng)模型;并運用該模型描述了同步時序電路;提出了增廣Petri網(wǎng)的授權(quán)矩陣、狀態(tài)轉(zhuǎn)移方程和觸發(fā)器次態(tài)與變遷授權(quán)條件的關(guān)系。在此基礎(chǔ)上可對同步時序電路描述和分析,并用實例證明了該方法的有效性。
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關(guān)鍵詞:
- 時序電路; 增廣Petri網(wǎng); 邏輯分析
Abstract: The models of the basic gates and typical flip-flops for Petri net are constructed by using a kind of extended Petri net with inhibitor arc. Then the syncronous sequential circuit are described. The enabled matrixes, the state equations and the relation between the next state of flip-flop and the enabled transition are given. Based on these, the analysis method of Petri net for synchronous sequential circuits is discussed. It is proved that the theory is effective by practical examples. -
古天龍.系統(tǒng)仿真學報,1994,6(2); 32-36.[2]閻石.數(shù)字電子技術(shù)基礎(chǔ).北京:高等教育出版社,1993, 236-302.[3]Peterson J L. Petri Net Theory and the Modeling of System. NJ: Prentice Hall, 1981,第3,4章.[4]Murata T. Proc[J].IEEE.1989, 77(4):541-574 -
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